Peter Beerel received his B.S.E. degree in Electrical Engineering from Princeton University in 1989, and his M.S. and Ph.D. degrees in Electrical Engineering from Stanford University in 1991 and 1994, respectively. He joined the Department of Electrical Engineering-Systems at the University of Southern California's Viterbi School of Engineering in 1994, where he is currently an Associate Professor. He was on a leave of absence from USC between June 2002 to September 2004, during which time he served as Vice-President of CAD and Verification at Fulcrum Microsystems. Dr. Beerel was also the Faculty Director of Innovation Studies at the USC Stevens Institute for Innovation from 2006 to 2008. In May of 2008, he took a second leave of absence from USC and co-founded TimeLess Design Automation with one of his Ph.D. students, Dr. Georgios Dimou. Their mission was to demonstrate and commercialize an asynchronous ASIC flow. They were successful and sold the company in July of 2010 to Fulcrum Microsystems. Dr. Beerel's research interests include a variety of topics in CAD and asynchronous VLSI design. He has been a member of the technical program committee for the International Symposium on Advanced Research in Asynchronous Circuits and Systems since 1997, was program co-chair for ASYNC'98, and was general co-chair for ASYNC'07. Dr. Beerel was recipient of a VSoE Outstanding Teaching Award in 1997 and the VSoE Junior Research Award in 1998. He received a National Science Foundation CAREER Award and a 1995 Zumberge Fellowship. He was also co-winner of the Charles E. Molnar award for two papers published in ASYNC'97 that best bridged theory and practice of asynchronous system design, and was a co-recipient of the best paper award in ASYNC'99. He was the 2008 recipient of the IEEE Region 6 Outstanding Engineer Award for significantly advancing the application of asynchronous circuits to modern VLSI chips.